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-   -   CACHE SRAM versions (http://zx-pk.ru/showthread.php?t=8701)

VELESOFT 26th October 2008 22:49

CACHE SRAM versions
 
1) Where I can find informations about CACHE SRAM ?

2) Is supported only 16 / 32kB versions ?

3) CACHE SRAM is used as ROM replacement ?

4) Memory 32kB-???kB is paged as original rom(via bit D4 on port 7FFD) ?

5) Write protect feature is supported ?

6) NMI button call TR-DOS rom or CACHE sram ?

7) is CACHE SRAM is active then RESET button always ronnect ZX rom ?

8) Is CACHE SRAM supported ? What version ?

VELESOFT

Keeper 27th October 2008 00:24

Quote:

Originally Posted by VELESOFT (Post 161299)
1) Where I can find informations about CACHE SRAM ?

2) Is supported only 16 / 32kB versions ?

3) CACHE SRAM is used as ROM replacement ?

4) Memory 32kB-???kB is paged as original rom(via bit D4 on port 7FFD) ?

5) Write protect feature is supported ?

6) NMI button call TR-DOS rom or CACHE sram ?

7) is CACHE SRAM is active then RESET button always ronnect ZX rom ?

8) Is CACHE SRAM supported ? What version ?

VELESOFT

1. http://zxdn.narod.ru/hardware.htm#shramrom and other electronic magazines.

2. The smalest one version was with 2Kb if I don`t mistake.

3. It was used for many things, for example: storing of the "Magic" button handling code

4. Yes

5. No. Or I don`t know about such feature...

6. It depends on the implementation of cache schematic. In some versions it calls cache in other trdos rom.

7. Reset button always connects rom.

8. It is supported but not very wide...

Spir0 27th October 2008 00:33

Quote:

Originally Posted by VELESOFT (Post 161299)
1) Where I can find informations about CACHE SRAM ?

http://cygnus.speccy.cz/popis_isorom128.php

Quote:

Originally Posted by VELESOFT (Post 161299)
2) Is supported only 16 / 32kB versions ?

Usually yes, but if you want you can use more , only form a higher address bit ;)

Quote:

Originally Posted by VELESOFT (Post 161299)
3) CACHE SRAM is used as ROM replacement ?

In some releases yes SRAM replace ROM via setting some bit in hardware port, it change statement on /CE and /OE pins.

Quote:

Originally Posted by VELESOFT (Post 161299)
4) Memory 32kB-???kB is paged as original rom(via bit D4 on port 7FFD) ?

If you using as SRAM over ROM - yes.

Quote:

Originally Posted by VELESOFT (Post 161299)
5) Write protect feature is supported ?

Yes

Quote:

Originally Posted by VELESOFT (Post 161299)
6) NMI button call TR-DOS rom or CACHE sram ?

Look answer 4 ;)

Quote:

Originally Posted by VELESOFT (Post 161299)
7) is CACHE SRAM is active then RESET button always ronnect ZX rom ?

Not always, some circuits don't use /RESET pin - so after RESET you still with SRAM mode on

Quote:

Originally Posted by VELESOFT (Post 161299)
8) Is CACHE SRAM supported ? What version ?

As i know SRAM supported in GLUK Reset Service and in some commanders (Real Commander)

VELESOFT 27th October 2008 01:42

Quote:

Originally Posted by Spir0 (Post 161343)

Thank, but this version is not supported (this interface use only one ZX user in Czech republic) :v2_conf2:

I need version supported on russian ZX clones/ZX emulators. Support PENTAGON 1024 or ATM TURBO allram mode/cache sram ?

VELESOFT

Keeper 27th October 2008 02:19

Quote:

Originally Posted by VELESOFT (Post 161354)
I need version supported on russian ZX clones/ZX emulators. Support PENTAGON 1024 or ATM TURBO allram mode/cache sram ?

Pentagon SL ver2.2 and ATM don`t have cache base on SRAM but these clones have ability to place RAM in page 0 (for Pentagon, ATM can place any RAM page in page 0) instead of ROM.

VELESOFT 27th October 2008 02:51

Quote:

Originally Posted by Keeper (Post 161359)
Pentagon SL ver2.2 and ATM don`t have cache base on SRAM but these clones have ability to place RAM in page 0 (for Pentagon, ATM can place any RAM page in page 0) instead of ROM.

PENTAGON 1024 and ATM TURBO can set any ram page in adress space 0-16383 ? This clones contain extra port for memory paging in first 16kB ? :v2_eek:

VELESOFT

Keeper 27th October 2008 03:50

Quote:

Originally Posted by VELESOFT (Post 161362)
PENTAGON 1024 and ATM TURBO can set any ram page in adress space 0-16383 ? This clones contain extra port for memory paging in first 16kB ? :v2_eek:

VELESOFT

ATM TURBO can set any ram page in adress space 0-16383. But Pentagon 1024SL Ver 2.2 can only disable rom and map page 0 in its address space: 0-16383

Black_Cat 27th October 2008 05:20

Quote:

Originally Posted by VELESOFT (Post 161299)
1) Where I can find informations about CACHE SRAM ?

2) Is supported only 16 / 32kB versions ?

3) CACHE SRAM is used as ROM replacement ?

4) Memory 32kB-???kB is paged as original rom(via bit D4 on port 7FFD) ?

5) Write protect feature is supported ?

6) NMI button call TR-DOS rom or CACHE sram ?

7) is CACHE SRAM is active then RESET button always ronnect ZX rom ?

8) Is CACHE SRAM supported ? What version ?

VELESOFT

http://www.zx.pk.ru/showpost.php?p=160558&postcount=11
For the clones ZX Spectrum ex USSR is not necessary to have an SRAM, so there is no single standard. Just for the clones ex USSR Cashe SRAM is rarely used, it is easier to increase the amount of RAM.
Tell me why you need it?

VELESOFT 27th October 2008 14:14

Quote:

Originally Posted by Black_Cat (Post 161364)
[url]Tell me why you need it?

I can modify system DEMFIR for russian ZX clones (if will enable in adress space 0-16383 use ram memory paging - ideal with write protect feature)
http://velesoft.speccy.cz/other/demfir.gif

VELESOFT

Black_Cat 27th October 2008 19:54

Quote:

Originally Posted by VELESOFT (Post 161431)
I can modify system DEMFIR for russian ZX clones

Where can I find it system?
Quote:

Originally Posted by VELESOFT (Post 161431)
(if will enable in adress space 0-16383 use ram memory paging - ideal with write protect feature)

You want to use SRAM inserted in the ROM socket?


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