Код:
01: MCIR = 1012
if (ss address mode == 0)
7A: R11 = Rr
40: R12 = Rs
else
switch(ss address mode)
case 0: Rs
45: A = R12 = Rs, word read start
58: stop microcode (error)
case 1: @RS
45: A = Rs, R12 = Rs, word read start
case 2: (Rd)+
45: A = Rs, Rs = Rs + 2, word read start
55: R12 = Rs – 2
case 3: @(Rs)+
45: A = Rs, word read start, Rs = Rs + 2
4C: wait read, R12 = Q,
A = Q, word read start
case 4: -(Rs)
45: Rs = Rs – 2, A = Rs, word read start
55: R12 = Rs
case 5: @-(Rs)
45: Rs = Rs – 2, A = Rs, word read start
4C: wait read, R12 = Q
A = Q, word read start
case 6: E(Rs)
45: A = PC, word read start, PC = PC + 2
44: wait read, R12 = Rs + Q,
A = R12, word read start
case 7: @E(Rs)
45: A = PC, word read start, PC = PC + 2
44: wait read, R12 = Rs + Q, A = R12
word read start
4C: wait read, R12 = Q,
A = Q, word read start
48: wait read, R12 = Q
//
// Аргументы получены в R11 и R12, можно выполнять умножение
//
// R11 – первый аргумент, R12 – второй
// R8 – старшие 16 бит произведения, R9 – младшие
32: R8 = 0
25: R10 = R11
6E: R9 = 1000008
74: FR C = R11[0], R11 = R11 >> 1
if (FR C)
69: R8 = R8 + R12, assign NZVC
6B: if (V) R8 = ROR(R8) else R8 = ASR(R8), assign NZVC
else
69: R8 = ASR(R8), assign NZVC
77: R9 = ROR(R9)
if (FR C == 0)
75: FR C = R11[0], R11 = R11 >> 1
69: next cycle
else
75: R10 = R10, set FR N
if (FR N)
76: R8 = R8 – R12
else MCIR = 1102
07: Rr = R8
06: R[r | 1] = R9
if (FR N==0 && FR Z==0)
7C: PSW |= 0000018
11: next instruction
else
if (FR N==1)
7C: R12 = R8 - 1777778
if (FR Z==0)
7E: PSW |= 0000018
11: next instruction
else
7E: R9 = R9
7D: PSW |= N ? 0000008 : 0000018
11: next instruction
else
7C: R9 = R9
if (FR N==0 && FR Z==0)
7F: R12 = 0000018, set NZVC
11: next instruction
else
if (FR N==0)
7F: PSW |= 0000008
11: next instruction
else
7F: PSW ^= 0000018, set NZVC
11: next instruction
Заодно пришлось разбираться с кодированием операции сдвигателя на выходе АЛУ.