The /WAIT pin on the MSX bus works in a very similar way to the /INT signal: It's a big logic AND between all the built-in devices & slots so any of those can request a WAIT (or a interrupt, in that case) to the CPU.
This was a feature clearly designed to allow Z80s with more than 5.37MHz (*1) to access the VRAM.
I did some tests some years ago, but I had no access to a logical analyzer. Those obviously are not very precise tests, but probably results are enough for the educated guess, until someone dissects this better using a logical analyzer.
The V9958 /WAIT generation indeed seem to be somewhat intelligent. My test set was done connecting a LED to the V9958 /WAIT output pin, and connecting the /WAIT to the CPU. The circuit was designed so that only V9958 /WAIT requests would light up the LED, isolating any /WAIT requests from other devices. My circuit could also disable the M1 waitstate generator for an instant +/-20% speed increase.
The results were:
1. If the WTE bit of the R#25 is disabled, no waitstate request is ever generated
2. I tested with several CPU clocks, to check the limits. When the WTE bit is enabled, those were the results:
2.1) From 1.78MHz to 5.37MHz no waitstate seems to be generated. Disabling the M1 waitstate at 5.37MHz resulted in the LED lighting up very dimly.
2.2) At 6MHz, the led started blinking very dim. This means that very few waitstates were being generated. Disabling the M1 waitstate instantly increased the LED brightness a bit.
2.3) At 7.14MHz the led light strobe seemed to be around 25% of the LED brightness
2.4) At 10.74MHz the led light strobe seemed to be around 50% of the LED brightness
From the educated guess side of things, what seemed to happen is that when the Z80 tried some VRAM access before of it's reserved time slot, the V9958 would issue the /WAIT until the access time slot comes.
As the V9958 datasheet states, no WAITs seem to be generated for accessing the V9958 registers. It only generates WAITs for VRAM access.
*1: 5.37MHz seems to be the V9958 limit for VRAM access without extra waits. The register access handles 7.14MHz without trouble, and maybe can take even more.
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