CACHE SRAM versions

[VELESOFT]

1) Where I can find informations about CACHE SRAM ?

2) Is supported only 16 / 32kB versions ?

3) CACHE SRAM is used as ROM replacement ?

4) Memory 32kB-???kB is paged as original rom(via bit D4 on port 7FFD) ?

5) Write protect feature is supported ?

6) NMI button call TR-DOS rom or CACHE sram ?

7) is CACHE SRAM is active then RESET button always ronnect ZX rom ?

8) Is CACHE SRAM supported ? What version ?

VELESOFT

[Keeper]

1) Where I can find informations about CACHE SRAM ?

2) Is supported only 16 / 32kB versions ?

3) CACHE SRAM is used as ROM replacement ?

4) Memory 32kB-???kB is paged as original rom(via bit D4 on port 7FFD) ?

5) Write protect feature is supported ?

6) NMI button call TR-DOS rom or CACHE sram ?

7) is CACHE SRAM is active then RESET button always ronnect ZX rom ?

8) Is CACHE SRAM supported ? What version ?

VELESOFT

1. http://zxdn.narod.ru/hardware.htm#shramrom and other electronic magazines.

2. The smalest one version was with 2Kb if I don`t mistake.

3. It was used for many things, for example: storing of the "Magic" button handling code

4. Yes

5. No. Or I don`t know about such feature...

6. It depends on the implementation of cache schematic. In some versions it calls cache in other trdos rom.

7. Reset button always connects rom.

8. It is supported but not very wide...

[Spir0]

1) Where I can find informations about CACHE SRAM ?

http://cygnus.speccy.cz/popis_isorom128.php


2) Is supported only 16 / 32kB versions ?

Usually yes, but if you want you can use more , only form a higher address bit ;)


3) CACHE SRAM is used as ROM replacement ?

In some releases yes SRAM replace ROM via setting some bit in hardware port, it change statement on /CE and /OE pins.


4) Memory 32kB-???kB is paged as original rom(via bit D4 on port 7FFD) ?

If you using as SRAM over ROM - yes.


5) Write protect feature is supported ?

Yes


6) NMI button call TR-DOS rom or CACHE sram ?

Look answer 4 ;)


7) is CACHE SRAM is active then RESET button always ronnect ZX rom ?

Not always, some circuits don't use /RESET pin - so after RESET you still with SRAM mode on


8) Is CACHE SRAM supported ? What version ?

As i know SRAM supported in GLUK Reset Service and in some commanders (Real Commander)

[VELESOFT]

http://cygnus.speccy.cz/popis_isorom128.php

Thank, but this version is not supported (this interface use only one ZX user in Czech republic) :v2_conf2:

I need version supported on russian ZX clones/ZX emulators. Support PENTAGON 1024 or ATM TURBO allram mode/cache sram ?

VELESOFT

[Keeper]

I need version supported on russian ZX clones/ZX emulators. Support PENTAGON 1024 or ATM TURBO allram mode/cache sram ?


Pentagon SL ver2.2 and ATM don`t have cache base on SRAM but these clones have ability to place RAM in page 0 (for Pentagon, ATM can place any RAM page in page 0) instead of ROM.

[VELESOFT]

Pentagon SL ver2.2 and ATM don`t have cache base on SRAM but these clones have ability to place RAM in page 0 (for Pentagon, ATM can place any RAM page in page 0) instead of ROM.

PENTAGON 1024 and ATM TURBO can set any ram page in adress space 0-16383 ? This clones contain extra port for memory paging in first 16kB ? :v2_eek:

VELESOFT

[Keeper]

PENTAGON 1024 and ATM TURBO can set any ram page in adress space 0-16383 ? This clones contain extra port for memory paging in first 16kB ? :v2_eek:

VELESOFT

ATM TURBO can set any ram page in adress space 0-16383. But Pentagon 1024SL Ver 2.2 can only disable rom and map page 0 in its address space: 0-16383

[Black_Cat]

1) Where I can find informations about CACHE SRAM ?

2) Is supported only 16 / 32kB versions ?

3) CACHE SRAM is used as ROM replacement ?

4) Memory 32kB-???kB is paged as original rom(via bit D4 on port 7FFD) ?

5) Write protect feature is supported ?

6) NMI button call TR-DOS rom or CACHE sram ?

7) is CACHE SRAM is active then RESET button always ronnect ZX rom ?

8) Is CACHE SRAM supported ? What version ?

VELESOFThttp://www.zx.pk.ru/showpost.php?p=160558&postcount=11
For the clones ZX Spectrum ex USSR is not necessary to have an SRAM, so there is no single standard. Just for the clones ex USSR Cashe SRAM is rarely used, it is easier to increase the amount of RAM.
Tell me why you need it?

[VELESOFT]

[url]Tell me why you need it?

I can modify system DEMFIR for russian ZX clones (if will enable in adress space 0-16383 use ram memory paging - ideal with write protect feature)
http://velesoft.speccy.cz/other/demfir.gif

VELESOFT

[Black_Cat]

I can modify system DEMFIR for russian ZX clonesWhere can I find it system?
(if will enable in adress space 0-16383 use ram memory paging - ideal with write protect feature)You want to use SRAM inserted in the ROM socket?

[VELESOFT]

Where can I find it system?You want to use SRAM inserted in the ROM socket?

Here you find all systems for DIVIDE interface:
http://www.divide.cz/?x=info

System DEMFIR and FATWARE is also modified for MB02+ interface(allram-paging ram in low 16kB)
http://www.worldofspectrum.org/forums/showthread.php?t=22163

But source code can be modified for use in ZX ram or in more 16kB pages of extra memory (on ZX clones).

Ideal is ram paging in low 16kB with write protect enable/disable.
And 100% way is connection DIVIDE interface to ZX machine/clone :v2_wink2:

VELESOFT

[Black_Cat]

Interface DIVIDE & MB02+ on the territory of Soviet Union are not supported. The most common standard IDE interface on the territory of Soviet Union is NemoIDE.