(c) ALSE - http://www.alse-fr.com/English

This is a complete project for the ispLSI1032/ispGDS Lattice demo board :

 * LCD display is active high
 * Reset is on SW8 (must be closed)
 * PS2_Data must be attached to pin30 (SW4 - must be open)
 * PS2_Clk  must be attached to pin31 (SW3 - must be open)

To make changes :

 - Make sure ispLever is patched to accept ispLSI 1032.
   (you must install the .obs files, and fix one file manually...)
 - Open the VHDL project with ispLEVER.
 - Verify that the pin assignments are done (vhdl.lct, verify see below)
 - Place & Route
 - Run ispVM to download.


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Input Pins
    Pin Name                Pin Attribute
        CLK                     LOCK 20, PULLUP
        PS2_CLK                 LOCK 31, PULLUP
        PS2_DATA                LOCK 30, PULLUP
        RESET                   LOCK 26, PULLUP


Output Pins
    Pin Name                Pin Attribute
        D7SEG_H(1)              LOCK 45, PULLUP
        D7SEG_H(2)              LOCK 46, PULLUP
        D7SEG_H(3)              LOCK 47, PULLUP
        D7SEG_H(4)              LOCK 48, PULLUP
        D7SEG_H(5)              LOCK 49, PULLUP
        D7SEG_H(6)              LOCK 50, PULLUP
        D7SEG_H(7)              LOCK 51, PULLUP
        D7SEG_L(1)              LOCK 34, PULLUP
        D7SEG_L(2)              LOCK 35, PULLUP
        D7SEG_L(3)              LOCK 36, PULLUP
        D7SEG_L(4)              LOCK 37, PULLUP
        D7SEG_L(5)              LOCK 38, PULLUP
        D7SEG_L(6)              LOCK 39, PULLUP
        D7SEG_L(7)              LOCK 40, PULLUP

        NLED                    LOCK 52, PULLUP
