OLD MAIL FROM AUTHOR OF VTRDOS
----- Original Message -----
From: ukms[z]
To: VELESOFT
Sent: Tuesday, October 28, 2008 1:46 PM
Subject: Re: ATM TURBO - FDC controller emulation (by Z80 cpu)
hi.
i wrote emulator for turbo2+ machine and it can work because of original architecture t2+
there is a lot of problems in emulation:
im2 music support by disk loaders
loader decrypting module uses tr-dos rom data (as a key)
low stack space in some important software
im2 realtime "is_disk_present?" control by some nice disk commanders
i don't solve only decrypting support, anyway, i finished to develope my emulator some years ago, and not sure to remember all problems...
it works by following algoritm:
* all in/out is replaced by RST, DB command
* rst handler check's int status and mode, remember it and block int's
* by the special T2+ memory port, rst handler toggle's ram page at #4000 place and check's A,B,C,D disk drive to RAM image mapping status. in this page stored many system settings for emulator.
* if current drive is emulated by ram, the rst handler read the command follow's rst and determines wich emulated (or no emulated) routine to call
* all in/out tr-dos routine are cached and have 2 copyes: one for real floppy disk, and second for precise byte-by-byte RAM disk read/write (for compatibility and it's work a little slower when real disk). original tr-dos routines used only like a trap.
rst handler not change #7ffd port and any another spectrum ports. it uses special T2+ ports for RAM disk access.
also rst handler supports basic control services for T2+ hardware, software hooking for NMI, reset, hi-memory access, and hooking for WD1793. it means that somebody can write another driver to emulate WD, not RAM disk only, but CF, IDE, LAN maybe ect.
therefore, the source of emulator is very complex software and contains additional block for cold/hot start, menu like BIOS at PC to manage emulator and hardware resourses T2+. it uses 32k from 128k rom T2+.
if you want this source, i can send it, but it requires ALASM 4 for compile and deep knowlege of T2+ architecture for understanding.
28.10.2008, в 0:15, VELESOFT(seznam) написал(а):
Hallo. Can you send me source code or documentation for software emulation of
FDC controller KR1818VG93 ( WD1793 ) ? ( MAXIM TIMONIN send me your mail )
I write software TRDOS emulator for ZX models without betadisk (for allram mode)
http://zx.pk.ru/showthread.php?p=161106#post161106
Video:
http://velesoft.speccy.cz/zx/divide/...rdos-video.gif
VELESOFT
http://velesoft.speccy.cz/
incorrect memory paging in trdos 6.11p
Each trdos rom must be compatible also with original 128kB machines (with ZX128 or Pentagon 128 and other clones using only paging port #7FFD).
TR-DOS 6.11p set as first port 7FFD and as second write value to port 1FFD. This is incorrect way !!! As first must be always set port #1FFD and as second set port #7FFD.
This trdos version can't be used on real betadisc interface connected to ZX Spectrum 128 / +2 or Pentagon 128 / 256 / 512. All this machines use ports adressation identical with original ZX128:
Adressation of port #7FFD: A15=0 + A1=0 (0xxxxxxx xxxxxx0x). Example - OUT #1FFD,0 write on this machines value 0 to paging port #7FFD = connect page 0 + vram 0 + 128 rom (set 128rom = disconnect trdos rom). Each value writed to port #1FFD in trdos rom must contain D4=1 (set 48rom) if trdos is used on 128kB computers and OUT #7FFD must be used after OUT #1FFD !!!. This code will full compatible with all ZX models and can work on PHOENIX computer. :v2_wink2:
UNREAL SPECCY emulator use unreal ports adressation for all ZX clones/models :v2_mad: Unreal speccy port adressation of port #7FFD: A15=0, A2=1 ( :v2_scare: ), A1=0.
Real computer Pentagon 128/256/512kB use adressation: A15=0 + A1=0.
Real Pentagon 1024SL 2.2 and 2.666LE use adress. : A15=0 + A14=1 + A1=0
UNREAL SPECCY use abnormal ports adressation and software work incorrect.
