MEMORY PAGING IN LOW 16kB

[Black_Cat]

MB02+ interface

MB02 + controller is not needed for exUSSR computers. For exUSSR computers easier to use a management system based on the basis of their own standards.

---------- Post added at 20:57 ---------- Previous post was at 20:21 ----------

Exist any russian interface with external memory mapped on rom area ?

Here's an example of a promising management system for exUSSR computers:

r/wCPU0 MANAGETMENT:

|D0#1FFD|D3#EFF7
|_0 _____|_0 - rdROM
|_0 _____|_1 - rdROM & wrRAM
|_1 _____|_0 - r/wRAM
|_1 _____|_1 - rdRAM

Adressing ROM in CPU0:

A14"ROM - D4 #7FFD
A15"ROM - D3 #1FFD
A16"ROM - D2 #1FFD
A17"ROM - D6 #1FFD
A18"ROM - D5 #1FFD

Adressing RAM in CPU0:
#9FFD CPU0(#0000-#3FFF) WINDOW PORT

D0 - A14'RAM
..
D7 - A21'RAM

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[VELESOFT]

MB02 + controller is not needed for exUSSR computers. For exUSSR computers easier to use a management system based on the basis of their own standards.

Yes I know. I russia is supported only trdos. But implementation memory paging (big cache sram) in low 16kB will open way to ported some systems from ZX Spectrum to russian machines. Modern ZX clones use 1-2MB memory. FPGA based clones with faster CPU use also ram in low 16kB for rom emulation. FLASH EPROM is after start copied to extended memory and writeprotected ram is connect to low 16kB (EPROM is too slow for fast CPU modes). If 128kB memory is extended to 1-4MB why can't be extended also russian cache sram to more than 16 or 32kB ? This don't need any hardware modification on FPGA clones and Garry Lancasted can ported RESIDOS to any ZX clone with low 16kB ram paging (but need also selectable writeprotect) and IDE ports. System in low 16kB can access to full ZX memory. For example is possible use modified ZX48 rom with TAP traps - tape emulation.

Here's an example of a promising management system for exUSSR computers:

r/wCPU0 MANAGETMENT:

|D0#1FFD|D3#EFF7
|_0 _____|_0 - rdROM
|_0 _____|_1 - rdROM & wrRAM
|_1 _____|_0 - r/wRAM
|_1 _____|_1 - rdRAM

Only one 16kB ram page ?

Adressing ROM in CPU0:

A14"ROM - D4 #7FFD
A15"ROM - D3 #1FFD
A16"ROM - D2 #1FFD
A17"ROM - D6 #1FFD
A18"ROM - D5 #1FFD

Also on new ZX clones ?

Adressing RAM in CPU0:
#9FFD CPU0(#0000-#3FFF) WINDOW PORT

D0 - A14'RAM
..
D7 - A21'RAM

What ZX clones use this mode ?