Микроконтроллеры STM32, "с нуля".

[dosikus]

О трудностях смд монтажа ...

Воздушный монтаж на скорую руку .






http://youtu.be/YekS6kWs4PQ
Планшет снимает дерьмово, в жизни все интересней...

#include <stm32f05x.h>

		static volatile uint32_t TimingDelay;
	  static volatile uint32_t TimerCntDN;
		static volatile uint32_t TimeOut;


/* Delay & timers */
		void SysTick_Handler(void) {
			if (TimingDelay) {
				TimingDelay--;
			}
			if (TimerCntDN) {
				TimerCntDN--;
			}
			if (TimeOut) {
				TimeOut--;
			}

		}


		void Delay_mS(uint32_t nTime) {
			TimingDelay = nTime;

			while (TimingDelay);
		}

/* main loop */

int main (void)
{

  uint16_t i;
  SysTick_Config(SystemCoreClock /1000);
  RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN;
  RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;

  GPIOA->MODER &= ~GPIO_MODER_MODER15|GPIO_MODER_MODER0;
  GPIOA->MODER |= GPIO_MODER_MODER15_1 | GPIO_MODER_MODER0_0;
  GPIOB->MODER &= ~(GPIO_MODER_MODER3 | GPIO_MODER_MODER10 | GPIO_MODER_MODER11);
  GPIOB->MODER |= ( GPIO_MODER_MODER3_1 | GPIO_MODER_MODER10_1 | GPIO_MODER_MODER11_1);

  GPIOA->AFR[1] |= (2<<(4*7));
  GPIOB->AFR[0] |= (2<<(4*3));
  GPIOB->AFR[1] |= (2<<(4*2))|(2<<(4*3));

  GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR15 | GPIO_OSPEEDER_OSPEEDR0;
  GPIOB->OSPEEDR |= (GPIO_OSPEEDER_OSPEEDR3 | GPIO_OSPEEDER_OSPEEDR10 | GPIO_OSPEEDER_OSPEEDR11);

  TIM2->PSC = 160-1;
  TIM2->ARR = 1000-1;
  TIM2->CCR1 = 70; // Pulse_Output = ARR - CCR1
  TIM2->CCR2 = 30;
  TIM2->CCR3 = 10;
  TIM2->CCR4 = 5;

  TIM2->CCMR1 |=
             TIM_CCMR1_OC1M_2 |
             TIM_CCMR1_OC1M_1 |
             TIM_CCMR1_OC1FE  |
             TIM_CCMR1_OC2M_2 |
             TIM_CCMR1_OC2M_1 |
             TIM_CCMR1_OC2FE
                            ;   // canell 1-2 PWM Mode1
   TIM2->CCMR2 |=
             TIM_CCMR2_OC3M_2 |
             TIM_CCMR2_OC3M_1 |
             TIM_CCMR2_OC3FE  |
             TIM_CCMR2_OC4M_2 |
             TIM_CCMR2_OC4M_1 |
             TIM_CCMR2_OC4FE
                            ;   // canell 3-4 PWM Mode1
  TIM2->CCER |=
             TIM_CCER_CC1E |
             TIM_CCER_CC2E |
             TIM_CCER_CC3E |
             TIM_CCER_CC4E
                          ;
  //TIM2->BDTR |= TIM_BDTR_MOE;

  TIM2->CR1   |= TIM_CR1_CEN;


	while(1)
  {

   for(i=0;i<800;i++)
   {
    TIM2->CCR1 = i;
     Delay_mS(1);
   }

   for(i=0;i<800;i++)
   {
    TIM2->CCR2 = i;
     Delay_mS(1);
   }

   for(i=0;i<800;i++)
   {
    TIM2->CCR3 = i;
     Delay_mS(1);
   }

   for(i=0;i<800;i++)
   {
    TIM2->CCR4 = i;
     Delay_mS(1);
   }

   for(i=800;i>0;i--)
   {
    TIM2->CCR1 = i;
     Delay_mS(1);
   }
   for(i=800;i>0;i--)
   {
    TIM2->CCR2 = i;
     Delay_mS(1);
   }
   for(i=800;i>0;i--)
   {
    TIM2->CCR3 = i;
     Delay_mS(1);
   }
   for(i=800;i>0;i--)
   {
    TIM2->CCR4 = i;
     Delay_mS(1);
   }
  }
	return 0;
}