Понятно, ты используешь более современный набор команд ATA, который есть не в каждом CF/HDD.
Для сброса предлагаю использовать механизм из предыдущего набора команд ATA (который есть везде) через бит D2 регистрa ide_control (056H в контроллере IDE RTC) - ставим D2 в "1", задержка 10ms, ставим D2 в "0":
Эмулятор надо тоже поправить под такой сброс (он у меня только от аппаратного /RES пока работает). Поправлю, причешу код, вечером выложу.Код:6.1.5.9 Device Control Register (Address - 3F6h[376h]; Offset Eh) This register is used to control the CompactFlash Storage Card interrupt request and to issue an ATA soft reset to the card. This register can be written even if the device is BUSY. The bits are defined as follows: D7 D6 D5 D4 D3 D2 D1 D0 X(0) X(0) X(0) X(0) X(0) SW Rst -IEn 0 Figure 53: Device Control Register Bit 7: this bit is ignored by the CompactFlash Storage Card. The host software should set this bit to 0. Bit 6: this bit is ignored by the CompactFlash Storage Card. The host software should set this bit to 0. Bit 5: this bit is ignored by the CompactFlash Storage Card. The host software should set this bit to 0. Bit 4: this bit is ignored by the CompactFlash Storage Card. The host software should set this bit to 0. Bit 3: this bit is ignored by the CompactFlash Storage Card. The host software should set this bit to 0. Bit 2 (SW Rst): this bit is set to 1 in order to force the CompactFlash Storage Card to perform an AT Disk controller Soft Reset operation. This does not change the PCMCIA Card Configuration Registers (see Section 4.4.4 to 4.4.9) as a hardware Reset does. The Card remains in Reset until this bit is reset to ‘0.’ Bit 1 (-IEn): the Interrupt Enable bit enables interrupts when the bit is 0. When the bit is 1, interrupts from the CompactFlash Storage Card are disabled. This bit also controls the Int bit in the Configuration and Status Register. This bit is set to 0 at power on and Reset. Bit 0: this bit is ignored by the CompactFlash Storage Card.




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