Single Transfer Mode
In Single Transfer mode
the device is programmed to make one transfer only.
The word count will be decremented and the address
decremented or incremented following each
transfer. When the word count ‘‘rolls over’’ from zero
to FFFFH, a Terminal Count (TC) will cause an Autoinitialize
if the channel has been programmed to do
so.
DREQ must be held active until DACK becomes active
in order to be recognized. If DREQ is held active
throughout the single transfer, HRQ will go inactive
and release the bus to the system. It will again go
active and, upon receipt of a new HLDA, another
single transfer will be performed. In 8080A, 8085AH,
8088, or 8086 system, this will ensure one full machine
cycle execution between DMA transfers. Details
of timing between the 8237A and other bus
control protocols will depend upon the characteristics
of the microprocessor involved.
Block Transfer Mode
In Block Transfer mode the
device is activated by DREQ to continue making
transfers during the service until a TC, caused by
word count going to FFFFH, or an external End of
Process (EOP) is encountered. DREQ need only be
held active until DACK becomes active. Again, an
Autoinitialization will occur at the end of the service
if the channel has been programmed for it.