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Тема: SjASMPlus от z00m

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  1. #1

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    Цитата Сообщение от Ped7g Посмотреть сообщение
    I'm not afraid to break Z80, so I can give it some try. But then again, sjasmplus is strongly Z80 oriented with pretty much everything hard-coded, so it may turn out to be clashing too much with current implementation, not worth the effort.
    можно сделать отдельный SJASMPLUSGB
    и вообще убрать из него z80

    Цитата Сообщение от Ped7g Посмотреть сообщение
    SAVEBIN
    думаю с экспортом проблем особых не будет
    gb gbc файлы не имеют какого либо заголовка
    там вроде просто лежат 16к страницы друг за другом подряд (плохо помню)
    и самих mapper-ов всего штуки 3

    правда в начале ПЗУ там кажется есть контрольная сумма
    если она не совпадает по моему запуск не происходит
    (я не знаю как она считается)

    но на bgb такой .gb можно и запустить
    и в нем же исправить контрольную сумму если что
    а потом можно запускать где угодно

    Цитата Сообщение от Ped7g Посмотреть сообщение
    who would check all opcodes and encodings after me
    Цитата Сообщение от Ped7g Посмотреть сообщение
    by commenting on the proposed syntax
    я предлагаю поддержать синтаксис который генерирует IDA
    + у меня есть некоторый дизассемблированный GB код полученный в IDA
    и я мог бы сравнить и проверить результат
    Последний раз редактировалось NEO SPECTRUMAN; 27.09.2019 в 11:04.

  2. #1
    С любовью к вам, Yandex.Direct
    Размещение рекламы на форуме способствует его дальнейшему развитию

  3. #2

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    Цитата Сообщение от NEO SPECTRUMAN Посмотреть сообщение
    можно сделать отдельный SJASMPLUSGB
    и вообще убрать из него z80
    дa, можно. (BSD-3 license, open source). But not *me*.


    Цитата Сообщение от NEO SPECTRUMAN Посмотреть сообщение
    я предлагаю поддержать синтаксис который генерирует IDA
    + у меня есть некоторый дизассемблированный GB код полученный в IDA
    и я мог бы сравнить и проверить результат
    Again, if anyone [else] wants to create it, I certainly can't stop him.

    But as long as we are talking about extra option to the sjasmplus I'm helping to maintain, the syntax of sjasmplus is to stay basically without change.

    Luckily I don't know IDA, so I have no idea what's different, so for me this kind of comments (without actual content) are easy to ignore.

    My question was if `ldi a,(hl)` is "good enough" (people will use sjasmplus even with this), or the `ld a,(hl+)` *must* be supported to make people even consider using sjasmplus for GB dev.

    If the syntax must be modified as whole, because GB devs will not accept sjasmplus syntax, then this leads nowhere, I don't have time/will to rewrite all of it, and then later to maintain it.

    I can add few exceptions here and there, maybe even "(hl+)" and "(hl-)", but if that will happen, it will be probably treated as fixed string, requiring it to be used in source in literal way (no extra space inside/etc). But as long as we are talking about *me* adding it to *zoom128's* branch, it's sjasmplus Z80 syntax in 95%, plus few important exceptions (which you must describe in greater detail than "like IDA", that means nothing to me and I don't want to invest my time googling how IDA looks)


    Цитата Сообщение от NEO SPECTRUMAN Посмотреть сообщение
    контрольная сумма
    I guess this one can be easily implemented with some macro in `DEVICE ZXSPECTRUM48` mode, just like there were those macros to calculate XOR/ADD checksums before. Even if it needs more complex formula of checksum. Such macro can be added to tests/macro_examples folder, so you will just include the asm file from there for definition, and use the macro at proper place after you have the header data in device memory defined.

    Meanwhile I did create a summary of the opcode differences, if somebody wants to check if I have them Oll Korrekt:
    LR35902_Z80_diff.ods.7z (it's ODS spread sheet file, two sheets)

    Basically it all boils down to somebody else investing their time to prepare the resources/details/info for me, so I don't need to waste my time on that. And after implementing it, again somebody else will have to review + check the result.

    You seem to be actively helping with this, so if you think you can go all the way along from start to finish, then it may become real (just don't expect it to be super simple, to deal with me ... I'm sometimes quite an ass ... and hole... )

  4. #3

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    Код:
    		;IDA		bgb		GBCPUman.pdf
    		
      defb $3E,0	;ld a,0		ld a,$00	LD A,n
      defb $06,0	;ld b,0		ld b,$00	LD B,n                      
      defb $0E,0	;ld c,0		ld c,$00	LD C,n                      
      defb $16,0	;ld d,0		ld d,$00	LD D,n                      
      defb $1E,0	;ld e,0		ld e,$00	LD E,n                   
      defb $26,0 	;ld h,0		ld h,$00	LD H,n                     
      defb $2E,0 	;ld l,0		ld l,$00	LD L,n     
    
    
      defb $7F 	;ld a,a		ld a,a		LD A,A	  
      defb $78 	;ld a,b		ld a,b		LD A,B		
      defb $79 	;ld a,c		ld a,c		LD A,C		
      defb $7A 	;ld a,d		ld a,d		LD A,D		
      defb $7B 	;ld a,e		ld a,e		LD A,E		
      defb $7C 	;ld a,h		ld a,h		LD A,H		
      defb $7D 	;ld a,l		ld a,l		LD A,L	
    					
      defb $47	;ld b,a		ld b,a		LD B,A
      defb $40 	;ld b,b		ld b,b		LD B,B		
      defb $41 	;ld b,c		ld b,c		LD B,C		
      defb $42 	;ld b,d		ld b,d		LD B,D		
      defb $43 	;ld b,e		ld b,e		LD B,E		
      defb $44 	;ld b,h		ld b,h		LD B,H		
      defb $45 	;ld b,l		ld b,l		LD B,L	
    					
      defb $4F	;ld c,a		ld c,a		LD C,A
      defb $48 	;ld c,b		ld c,b		LD C,B		
      defb $49 	;ld c,c		ld c,c		LD C,C		
      defb $4A 	;ld c,d		ld c,d		LD C,D		
      defb $4B 	;ld c,e		ld c,e		LD C,E		
      defb $4C 	;ld c,h		ld c,h		LD C,H		
      defb $4D 	;ld c,l		ld c,l		LD C,L		
    					
      defb $57	;ld d,a		ld d,a		LD D,A
      defb $50 	;ld d,b		ld d,b		LD D,B		
      defb $51 	;ld d,c		ld d,c		LD D,C		
      defb $52 	;ld d,d		ld d,d		LD D,D      
      defb $53 	;ld d,e		ld d,e		LD D,E      
      defb $54 	;ld d,h		ld d,h		LD D,H      
      defb $55 	;ld d,l		ld d,l		LD D,L      
    					
      defb $5F	;ld e,a		ld e,a		LD E,A
      defb $58 	;ld e,b		ld e,b		LD E,B      
      defb $59 	;ld e,c		ld e,c		LD E,C      
      defb $5A 	;ld e,d		ld e,d		LD E,D      
      defb $5B 	;ld e,e		ld e,e		LD E,E      
      defb $5C 	;ld e,h		ld e,h		LD E,H      
      defb $5D 	;ld e,l		ld e,l		LD E,L   
    					
      defb $67	;ld h,a		ld h,a		LD H,A
      defb $60 	;ld h,b		ld h,b		LD H,B      
      defb $61 	;ld h,c		ld h,c		LD H,C      
      defb $62 	;ld h,d		ld h,d		LD H,D      
      defb $63 	;ld h,e		ld h,e		LD H,E      
      defb $64 	;ld h,h		ld h,h		LD H,H      
      defb $65 	;ld h,l		ld h,l		LD H,L      
    					
      defb $6F	;ld l,a		ld l,a		LD L,A
      defb $68 	;ld l,b		ld l,b		LD L,B      
      defb $69 	;ld l,c		ld l,c		LD L,C      
      defb $6A 	;ld l,d		ld l,d		LD L,D      
      defb $6B 	;ld l,e		ld l,e		LD L,E      
      defb $6C 	;ld l,h		ld l,h		LD L,H      
      defb $6D	;ld l,l		ld l,l		LD L,L    
    
    
      defb $77	;ld [hl],a	ld [hl],a	LD (HL),A 
      defb $70	;ld [hl],b	ld [hl],b	LD (HL),B   
      defb $71	;ld [hl],c	ld [hl],c	LD (HL),C   
      defb $72	;ld [hl],d	ld [hl],d	LD (HL),D   
      defb $73	;ld [hl],e	ld [hl],e	LD (HL),E   
      defb $74	;ld [hl],h	ld [hl],h	LD (HL),H   
      defb $75	;ld [hl],l	ld [hl],l	LD (HL),L   
      
      
      defb $36,0	;ld [hl],0	ld [hl],$00	LD (HL),n   
    
    
      defb $7E 	;ld a,[hl]	ld a,[hl]	LD A,(HL)
      defb $46 	;ld b,[hl]	ld b,[hl]	LD B,(HL)
      defb $4E 	;ld c,[hl]	ld c,[hl]	LD C,(HL)
      defb $56 	;ld d,[hl]	ld d,[hl]	LD D,(HL)    
      defb $5E 	;ld e,[hl]	ld e,[hl]	LD E,(HL)  
      defb $66 	;ld h,[hl]	ld h,[hl]	LD H,(HL)  
      defb $6E	;ld l,[hl]	ld l,[hl]	LD L,(HL)  
    
    
      defb $0A 	;ld a,[bc]	ld a,[bc]	LD A,(BC)
      defb $1A 	;ld a,[de]	ld a,[de]	LD A,(DE)
      
      
      defb $02	;ld [bc],a	ld [bc],a	LD (BC),A  
      defb $12	;ld [de],a	ld [de],a	LD (DE),A  
      
      
      defb $FA,0,0	;ld a,[0]	ld a,[$0000]	LD A,(nn)		!!!!	different opcode
      
      defb $EA,0,0	;ld [0],a	ld [$0000],a	LD (nn),A  	 	!!!!	different opcode
     
     
      defb $F2	;ld a,[c]	ld a,[$ff00+c]	LD A,(C) \ LD A,($FF00+C)	!!!!!!
     
      defb $E2	;ld [c], a	ld [$ff00+c],a	ld (C),A \ LD ($FF00+C),A     	!!!!!!
    
    
      defb $3A	;ldd a,[hl]	ldd a,[hl]	LD A,(HLD) \ LDD A,(HL) \ LD A,(HL-)
      
      defb $2A	;ldi a,[hl]	ldi a,[hl]	LD A,(HLI) \ LDI A,(HL) \ LD A,(HL+)	
    		
    		
      defb $32	;ldd [hl],a	ldd [hl],a	LD (HLD),A \ LDD (HL),A \ LD (HL-),A
      
      defb $22	;ldi [hl],a	ldi [hl],a	LD (HLI),A \ LDI (HL),A \ LD (HL+),A
    
    
      defb $F0,0	;ld a,[$FF00]	ldh a,[$FF00] 	LDH A,(n) \ LD A,($FF00+n)
      
      defb $E0,0	;ld [$FF00],a	ldh [$FF00],a	LDH (n),A \ LD ($FF00+n),A 
     
    
      defb $01,0,0	;ld bc,0	ld bc,$0000	LD BC,nn  
      defb $11,0,0	;ld de,0	ld de,$0000	LD DE,nn  
      defb $21,0,0	;ld hl,0	ld hl,$0000	LD HL,nn  
      defb $31,0,0	;ld sp,0	ld sp,$0000	LD SP,nn  
      
      defb $F9	;ld sp,hl	ld sp,hl	LD SP,HL           
      
      defb $F8,0	;ld hl,sp+0	ld hl,[sp+$00]	LD HL,SP+n \ LDHL SP,n	!!!!!!!!
      
      defb $08,0,0	;ld [0],sp	ld [$0000],sp	LD (nn),SP         
      
      
      defb $F5	;push af	push af		PUSH AF
      defb $C5	;push bc	push bc		PUSH BC
      defb $D5	;push de	push de		PUSH DE
      defb $E5	;push hl	push hl		PUSH HL
      
      defb $F1	;pop af		pop af		POP AF 
      defb $C1	;pop bc		pop bc		POP BC 
      defb $D1	;pop de		pop de		POP DE 
      defb $E1	;pop hl		pop hl		POP HL 
      
      
      defb $87	;add a,a	add a		ADD A,A    
      defb $80	;add a,b	add b		ADD A,B    
      defb $81	;add a,c	add c		ADD A,C    
      defb $82	;add a,d	add d		ADD A,D    
      defb $83	;add a,e	add e		ADD A,E    
      defb $84	;add a,h	add h		ADD A,H    
      defb $85	;add a,l	add l		ADD A,L    
      
     
      defb $8F	;adc a,a	adc a		ADC A,A               
      defb $88	;adc a,b	adc b		ADC A,B               
      defb $89	;adc a,c	adc c		ADC A,C               
      defb $8A	;adc a,d	adc d		ADC A,D               
      defb $8B	;adc a,e	adc e		ADC A,E               
      defb $8C	;adc a,h	adc h		ADC A,H               
      defb $8D	;adc a,l	adc l		ADC A,L               
    
    
      defb $97	;sub a		sub a		SUB A                
      defb $90	;sub b		sub b		SUB B                
      defb $91	;sub c		sub c		SUB C                
      defb $92	;sub d		sub d		SUB D                
      defb $93	;sub e		sub e		SUB E                
      defb $94	;sub h		sub h		SUB H                
      defb $95	;sub l		sub l		SUB L                
      
      
      defb $9F	;sbc a,a	sbc a		SBC A,A    
      defb $98	;sbc a,b	sbc b		SBC A,B    
      defb $99	;sbc a,c	sbc c		SBC A,C    
      defb $9A	;sbc a,d	sbc d		SBC A,D    
      defb $9B	;sbc a,e	sbc e		SBC A,E    
      defb $9C	;sbc a,h	sbc h		SBC A,H    
      defb $9D	;sbc a,l	sbc l		SBC A,L    
      
      
      defb $A7	;and a		and a		AND A     
      defb $A0	;and b		and b		AND B     
      defb $A1	;and c		and c		AND C     
      defb $A2	;and d		and d		AND D     
      defb $A3	;and e		and e		AND E     
      defb $A4	;and h		and h		AND H     
      defb $A5	;and l		and l		AND L     
    
      
      defb $B7	;or a		or a		OR A    
      defb $B0	;or b		or b		OR B    
      defb $B1	;or c		or c		OR C    
      defb $B2	;or d		or d		OR D    
      defb $B3	;or e		or e		OR E    
      defb $B4	;or h		or h		OR H    
      defb $B5	;or l		or l		OR L    
      
      
      defb $AF	;xor a		xor a		XOR A   
      defb $A8	;xor b		xor b		XOR B   
      defb $A9	;xor c		xor c		XOR C   
      defb $AA	;xor d		xor d		XOR D   
      defb $AB	;xor e		xor e		XOR E   
      defb $AC	;xor h		xor h		XOR H   
      defb $AD	;xor l		xor l		XOR L   
    
      
      defb $BF	;cp a		cp a		CP A   
      defb $B8	;cp b		cp b		CP B   
      defb $B9	;cp c		cp c		CP C   
      defb $BA	;cp d		cp d		CP D   
      defb $BB	;cp e		cp e		CP E   
      defb $BC	;cp h		cp h		CP H   
      defb $BD	;cp l		cp l		CP L   
    
      
      defb $3C	;inc a		inc a		INC A   
      defb $04	;inc b		inc b		INC B   
      defb $0C	;inc c		inc c		INC C   
      defb $14	;inc d		inc d		INC D   
      defb $1C	;inc e		inc e		INC E   
      defb $24	;inc h		inc h		INC H   
      defb $2C	;inc l		inc l		INC L   
    
    
      defb $3D	;dec a		dec a		DEC A    
      defb $05	;dec b		dec b		DEC B    
      defb $0D	;dec c		dec c		DEC C    
      defb $15	;dec d		dec d		DEC D    
      defb $1D	;dec e		dec e		DEC E    
      defb $25	;dec h		dec h		DEC H    
      defb $2D	;dec l		dec l		DEC L    
    
    
      defb $86	;add a,[hl]	add [hl]	ADD A,(HL) 
      defb $8E	;adc a,[hl]	adc [hl]	ADC A,(HL)            
      defb $96	;sub [hl]	sub [hl]	SUB (HL)  
      defb $9E	;sbc a,[hl]	sbc [hl]	SBC A,(HL) 
      defb $A6	;and [hl]	and [hl]	AND (HL)  
      defb $B6	;or [hl]	or [hl]		OR (HL) 
      defb $AE	;xor [hl]	xor [hl]	XOR (HL)
      defb $BE	;cp [hl]	cp [hl]		CP (HL)
      defb $34	;inc [hl]	inc [hl]	INC (HL)
      defb $35	;dec [hl]	dec [hl]	DEC (HL) 
        
      
      defb $C6,0	;add a,0	add a,$00	ADD A,n   
      defb $CE,0	;adc a,0	adc a,$00	ADC A,n     
      defb $D6,0	;sub 0		sub a,$00	SUB n      
      defb $DE,0	;sbc a,0	sbc a,$00	SBC A,n		    
      defb $E6,0	;and 0		and a,$00	AND n     
      defb $F6,0	;or 0		or a,$00	OR n  
      defb $EE,0	;xor 0		xor a,$00	XOR n   
      defb $FE,0	;cp 0		cp a,$00	CP n   
      
      
      defb $09	;add hl,bc	add hl,bc	ADD HL,BC
      defb $19	;add hl,de	add hl,de	ADD HL,DE
      defb $29	;add hl,hl	add hl,hl	ADD HL,HL
      defb $39	;add hl,sp	add hl,sp	ADD HL,SP
      
      
      defb $E8,0	;add sp,0	add sp,$00	ADD SP,n 
      
      
      defb $03	;inc bc		inc bc		INC BC
      defb $13	;inc de		inc de		INC DE
      defb $23	;inc hl		inc hl		INC HL
      defb $33	;inc sp		inc sp		INC SP
      
      
      defb $0B	;dec bc		dec bc		DEC BC
      defb $1B	;dec de		dec de		DEC DE
      defb $2B	;dec hl		dec hl		DEC HL
      defb $3B	;dec sp		dec sp		DEC SP
      
      
      defb $CB,$37	;swap a		swap a		SWAP A   
      defb $CB,$30	;swap b		swap b		SWAP B   
      defb $CB,$31	;swap c		swap c		SWAP C   
      defb $CB,$32	;swap d		swap d		SWAP D   
      defb $CB,$33	;swap e		swap e		SWAP E   
      defb $CB,$34	;swap h		swap h		SWAP H   
      defb $CB,$35	;swap l		swap l		SWAP L   
    
      defb $CB,$36	;swap [hl]	swap [hl]	SWAP (HL)
      
      
      defb $27 	;daa		daa		DAA 
      defb $2F	;cpl		cpl		CPL	     
      defb $3F	;ccf		ccf		CCF           
      defb $37 	;scf		scf		SCF
      
      defb $00	;nop		nop		NOP
      
      defb $76	;halt		halt		HALT   
      defb $10,$00	;stop		stop		STOP
      defb $F3	;di		di		DI        
      defb $FB	;ei		ei		EI
      
      
      defb $07	;rlca		rlca 		RLCA    
      defb $17	;rla		rla  		RLA
      defb $0F	;rrca		rrca 		RRCA    
      defb $1F	;rra		rra  		RRA
    
    
      defb $CB,$07	;rlc a		rlc a		RLC A   
      defb $CB,$00	;rlc b		rlc b		RLC B   
      defb $CB,$01	;rlc c		rlc c		RLC C   
      defb $CB,$02	;rlc d		rlc d		RLC D   
      defb $CB,$03	;rlc e		rlc e		RLC E   
      defb $CB,$04	;rlc h		rlc h		RLC H   
      defb $CB,$05	;rlc l		rlc l		RLC L   
    		                
    		                
      defb $CB,$17	;rl a		rl a		RL A   
      defb $CB,$10	;rl b		rl b		RL B   
      defb $CB,$11	;rl c		rl c		RL C   
      defb $CB,$12	;rl d		rl d		RL D   
      defb $CB,$13	;rl e		rl e		RL E   
      defb $CB,$14	;rl h		rl h		RL H   
      defb $CB,$15	;rl l		rl l		RL L   
    		                
    		                
      defb $CB,$0F	;rrc a		rrc a		RRC A   
      defb $CB,$08	;rrc b		rrc b		RRC B   
      defb $CB,$09	;rrc c		rrc c		RRC C   
      defb $CB,$0A	;rrc d		rrc d		RRC D   
      defb $CB,$0B	;rrc e		rrc e		RRC E   
      defb $CB,$0C	;rrc h		rrc h		RRC H   
      defb $CB,$0D	;rrc l		rrc l		RRC L   
    		                
    		                
      defb $CB,$1F	;rr a		rr a		RR A   
      defb $CB,$18	;rr b		rr b		RR B   
      defb $CB,$19	;rr c		rr c		RR C   
      defb $CB,$1A	;rr d		rr d		RR D   
      defb $CB,$1B	;rr e		rr e		RR E   
      defb $CB,$1C	;rr h		rr h		RR H   
      defb $CB,$1D	;rr l		rr l		RR L   
    		                
    		                
      defb $CB,$27	;sla a		sla a		SLA A   
      defb $CB,$20	;sla b		sla b		SLA B   
      defb $CB,$21	;sla c		sla c		SLA C   
      defb $CB,$22	;sla d		sla d		SLA D   
      defb $CB,$23	;sla e		sla e		SLA E   
      defb $CB,$24	;sla h		sla h		SLA H   
      defb $CB,$25	;sla l		sla l		SLA L   
    		                
    		                
      defb $CB,$2F	;sra a		sra a		SRA A   
      defb $CB,$28	;sra b		sra b		SRA B   
      defb $CB,$29	;sra c		sra c		SRA C   
      defb $CB,$2A	;sra d		sra d		SRA D   
      defb $CB,$2B	;sra e		sra e		SRA E   
      defb $CB,$2C	;sra h		sra h		SRA H   
      defb $CB,$2D	;sra l		sra l		SRA L   
    		                
    		                
      defb $CB,$3F	;srl a		srl a		SRL A   
      defb $CB,$38	;srl b		srl b		SRL B   
      defb $CB,$39	;srl c		srl c		SRL C   
      defb $CB,$3A	;srl d		srl d		SRL D   
      defb $CB,$3B	;srl e		srl e		SRL E   
      defb $CB,$3C	;srl h		srl h		SRL H   
      defb $CB,$3D	;srl l		srl l		SRL L   
    
      
      defb $CB,$06	;rlc [hl]	rlc [hl]	RLC (HL)
      defb $CB,$16	;rl [hl]	rl [hl]		RL (HL)
      defb $CB,$0E	;rrc [hl]	rrc [hl]	RRC (HL)
      defb $CB,$1E	;rr [hl]	rr [hl]		RR (HL)
      defb $CB,$26	;sla [hl]	sla [hl]	SLA (HL)
      defb $CB,$2E	;sra [hl]	sra [hl]	SRA (HL)
      defb $CB,$3E	;srl [hl]	srl [hl]	SRL (HL)
      
      
      defb $CB,$47	;bit 0,a	bit  0,a	BIT 0,A
      defb $CB,$40	;bit 0,b	bit  0,b	BIT 0,B   	
      defb $CB,$41	;bit 0,c	bit  0,c	BIT 0,C   
      defb $CB,$42	;bit 0,d	bit  0,d	BIT 0,D   
      defb $CB,$43	;bit 0,e	bit  0,e	BIT 0,E   
      defb $CB,$44	;bit 0,h	bit  0,h	BIT 0,H   
      defb $CB,$45	;bit 0,l	bit  0,l	BIT 0,L   
      
      defb $CB,$47+$08	;bit 1,a	bit 1,a		BIT 1,A
      defb $CB,$40+$08	;bit 1,b	bit 1,b		BIT 1,B   	
      defb $CB,$41+$08	;bit 1,c	bit 1,c		BIT 1,C   
      defb $CB,$42+$08	;bit 1,d	bit 1,d		BIT 1,D   
      defb $CB,$43+$08	;bit 1,e	bit 1,e		BIT 1,E   
      defb $CB,$44+$08	;bit 1,h	bit 1,h		BIT 1,H   
      defb $CB,$45+$08	;bit 1,l	bit 1,l		BIT 1,L  
    						
      defb $CB,$47+$10	;bit 2,a	bit 2,a		BIT 2,A
      defb $CB,$40+$10	;bit 2,b	bit 2,b		BIT 2,B   	
      defb $CB,$41+$10	;bit 2,c	bit 2,c		BIT 2,C   
      defb $CB,$42+$10	;bit 2,d	bit 2,d		BIT 2,D   
      defb $CB,$43+$10	;bit 2,e	bit 2,e		BIT 2,E   
      defb $CB,$44+$10	;bit 2,h	bit 2,h		BIT 2,H   
      defb $CB,$45+$10	;bit 2,l	bit 2,l		BIT 2,L 
    						
      defb $CB,$47+$18	;bit 3,a	bit 3,a		BIT 3,A
      defb $CB,$40+$18	;bit 3,b	bit 3,b		BIT 3,B   	
      defb $CB,$41+$18	;bit 3,c	bit 3,c		BIT 3,C   
      defb $CB,$42+$18	;bit 3,d	bit 3,d		BIT 3,D   
      defb $CB,$43+$18	;bit 3,e	bit 3,e		BIT 3,E   
      defb $CB,$44+$18	;bit 3,h	bit 3,h		BIT 3,H   
      defb $CB,$45+$18	;bit 3,l	bit 3,l		BIT 3,L 
    						
      defb $CB,$47+$20	;bit 4,a	bit 4,a		BIT 4,A
      defb $CB,$40+$20	;bit 4,b	bit 4,b		BIT 4,B   	
      defb $CB,$41+$20	;bit 4,c	bit 4,c		BIT 4,C   
      defb $CB,$42+$20	;bit 4,d	bit 4,d		BIT 4,D   
      defb $CB,$43+$20	;bit 4,e	bit 4,e		BIT 4,E   
      defb $CB,$44+$20	;bit 4,h	bit 4,h		BIT 4,H   
      defb $CB,$45+$20	;bit 4,l	bit 4,l		BIT 4,L 
    						
      defb $CB,$47+$28	;bit 5,a	bit 5,a		BIT 5,A
      defb $CB,$40+$28	;bit 5,b	bit 5,b		BIT 5,B   	
      defb $CB,$41+$28	;bit 5,c	bit 5,c		BIT 5,C   
      defb $CB,$42+$28	;bit 5,d	bit 5,d		BIT 5,D   
      defb $CB,$43+$28	;bit 5,e	bit 5,e		BIT 5,E   
      defb $CB,$44+$28	;bit 5,h	bit 5,h		BIT 5,H   
      defb $CB,$45+$28	;bit 5,l	bit 5,l		BIT 5,L 
    						
      defb $CB,$47+$30	;bit 6,a	bit 6,a		BIT 6,A
      defb $CB,$40+$30	;bit 6,b	bit 6,b		BIT 6,B   	
      defb $CB,$41+$30	;bit 6,c	bit 6,c		BIT 6,C   
      defb $CB,$42+$30	;bit 6,d	bit 6,d		BIT 6,D   
      defb $CB,$43+$30	;bit 6,e	bit 6,e		BIT 6,E   
      defb $CB,$44+$30	;bit 6,h	bit 6,h		BIT 6,H   
      defb $CB,$45+$30	;bit 6,l	bit 6,l		BIT 6,L 
    						
      defb $CB,$47+$38	;bit 7,a	bit 7,a		BIT 7,A
      defb $CB,$40+$38	;bit 7,b	bit 7,b		BIT 7,B   	
      defb $CB,$41+$38	;bit 7,c	bit 7,c		BIT 7,C   
      defb $CB,$42+$38	;bit 7,d	bit 7,d		BIT 7,D   
      defb $CB,$43+$38	;bit 7,e	bit 7,e		BIT 7,E   
      defb $CB,$44+$38	;bit 7,h	bit 7,h		BIT 7,H   
      defb $CB,$45+$38	;bit 7,l	bit 7,l		BIT 7,L 
      
      
      defb $CB,$C7	;set 0,a	set 0,a		SET 0,A
      defb $CB,$C0	;set 0,b	set 0,b		SET 0,B   
      defb $CB,$C1	;set 0,c	set 0,c		SET 0,C   
      defb $CB,$C2	;set 0,d	set 0,d		SET 0,D   
      defb $CB,$C3	;set 0,e	set 0,e		SET 0,E   
      defb $CB,$C4	;set 0,h	set 0,h		SET 0,H   
      defb $CB,$C5	;set 0,l	set 0,l		SET 0,L   
      
      defb $CB,$C7+$08	;set 1,a	set 1,a		SET 1,A
      defb $CB,$C0+$08	;set 1,b	set 1,b		SET 1,B   
      defb $CB,$C1+$08	;set 1,c	set 1,c		SET 1,C   
      defb $CB,$C2+$08	;set 1,d	set 1,d		SET 1,D   
      defb $CB,$C3+$08	;set 1,e	set 1,e		SET 1,E   
      defb $CB,$C4+$08	;set 1,h	set 1,h		SET 1,H   
      defb $CB,$C5+$08	;set 1,l	set 1,l		SET 1,L 
    					
      defb $CB,$C7+$10	;set 2,a	set 2,a		SET 2,A
      defb $CB,$C0+$10	;set 2,b	set 2,b		SET 2,B   
      defb $CB,$C1+$10	;set 2,c	set 2,c		SET 2,C   
      defb $CB,$C2+$10	;set 2,d	set 2,d		SET 2,D   
      defb $CB,$C3+$10	;set 2,e	set 2,e		SET 2,E   
      defb $CB,$C4+$10	;set 2,h	set 2,h		SET 2,H   
      defb $CB,$C5+$10	;set 2,l	set 2,l		SET 2,L 
    					
      defb $CB,$C7+$18	;set 3,a	set 3,a		SET 3,A
      defb $CB,$C0+$18	;set 3,b	set 3,b		SET 3,B   
      defb $CB,$C1+$18	;set 3,c	set 3,c		SET 3,C   
      defb $CB,$C2+$18	;set 3,d	set 3,d		SET 3,D   
      defb $CB,$C3+$18	;set 3,e	set 3,e		SET 3,E   
      defb $CB,$C4+$18	;set 3,h	set 3,h		SET 3,H   
      defb $CB,$C5+$18	;set 3,l	set 3,l		SET 3,L 
    					
      defb $CB,$C7+$20	;set 4,a	set 4,a		SET 4,A
      defb $CB,$C0+$20	;set 4,b	set 4,b		SET 4,B   
      defb $CB,$C1+$20	;set 4,c	set 4,c		SET 4,C   
      defb $CB,$C2+$20	;set 4,d	set 4,d		SET 4,D   
      defb $CB,$C3+$20	;set 4,e	set 4,e		SET 4,E   
      defb $CB,$C4+$20	;set 4,h	set 4,h		SET 4,H   
      defb $CB,$C5+$20	;set 4,l	set 4,l		SET 4,L 
    					
      defb $CB,$C7+$28	;set 5,a	set 5,a		SET 5,A
      defb $CB,$C0+$28	;set 5,b	set 5,b		SET 5,B   
      defb $CB,$C1+$28	;set 5,c	set 5,c		SET 5,C   
      defb $CB,$C2+$28	;set 5,d	set 5,d		SET 5,D   
      defb $CB,$C3+$28	;set 5,e	set 5,e		SET 5,E   
      defb $CB,$C4+$28	;set 5,h	set 5,h		SET 5,H   
      defb $CB,$C5+$28	;set 5,l	set 5,l		SET 5,L 
    					
      defb $CB,$C7+$30	;set 6,a	set 6,a		SET 6,A
      defb $CB,$C0+$30	;set 6,b	set 6,b		SET 6,B   
      defb $CB,$C1+$30	;set 6,c	set 6,c		SET 6,C   
      defb $CB,$C2+$30	;set 6,d	set 6,d		SET 6,D   
      defb $CB,$C3+$30	;set 6,e	set 6,e		SET 6,E   
      defb $CB,$C4+$30	;set 6,h	set 6,h		SET 6,H   
      defb $CB,$C5+$30	;set 6,l	set 6,l		SET 6,L 
    					
      defb $CB,$C7+$38	;set 7,a	set 7,a		SET 7,A
      defb $CB,$C0+$38	;set 7,b	set 7,b		SET 7,B   
      defb $CB,$C1+$38	;set 7,c	set 7,c		SET 7,C   
      defb $CB,$C2+$38	;set 7,d	set 7,d		SET 7,D   
      defb $CB,$C3+$38	;set 7,e	set 7,e		SET 7,E   
      defb $CB,$C4+$38	;set 7,h	set 7,h		SET 7,H   
      defb $CB,$C5+$38	;set 7,l	set 7,l		SET 7,L 
      
      
      defb $CB,$87	;res 0,a	res 0,a		RES 0,A
      defb $CB,$80	;res 0,b	res 0,b		RES 0,B   
      defb $CB,$81	;res 0,c	res 0,c		RES 0,C   
      defb $CB,$82	;res 0,d	res 0,d		RES 0,D   
      defb $CB,$83	;res 0,e	res 0,e		RES 0,E   
      defb $CB,$84	;res 0,h	res 0,h		RES 0,H   
      defb $CB,$85	;res 0,l	res 0,l		RES 0,L   
    
      defb $CB,$87+$08	;res 1,a	res 1,a		RES 1,A
      defb $CB,$80+$08	;res 1,b	res 1,b		RES 1,B   
      defb $CB,$81+$08	;res 1,c	res 1,c		RES 1,C   
      defb $CB,$82+$08	;res 1,d	res 1,d		RES 1,D   
      defb $CB,$83+$08	;res 1,e	res 1,e		RES 1,E   
      defb $CB,$84+$08	;res 1,h	res 1,h		RES 1,H   
      defb $CB,$85+$08	;res 1,l	res 1,l		RES 1,L  
    					
      defb $CB,$87+$10	;res 2,a	res 2,a		RES 2,A
      defb $CB,$80+$10	;res 2,b	res 2,b		RES 2,B   
      defb $CB,$81+$10	;res 2,c	res 2,c		RES 2,C   
      defb $CB,$82+$10	;res 2,d	res 2,d		RES 2,D   
      defb $CB,$83+$10	;res 2,e	res 2,e		RES 2,E   
      defb $CB,$84+$10	;res 2,h	res 2,h		RES 2,H   
      defb $CB,$85+$10	;res 2,l	res 2,l		RES 2,L  
    					
      defb $CB,$87+$18	;res 3,a	res 3,a		RES 3,A
      defb $CB,$80+$18	;res 3,b	res 3,b		RES 3,B   
      defb $CB,$81+$18	;res 3,c	res 3,c		RES 3,C   
      defb $CB,$82+$18	;res 3,d	res 3,d		RES 3,D   
      defb $CB,$83+$18	;res 3,e	res 3,e		RES 3,E   
      defb $CB,$84+$18	;res 3,h	res 3,h		RES 3,H   
      defb $CB,$85+$18	;res 3,l	res 3,l		RES 3,L 
    					
      defb $CB,$87+$20	;res 4,a	res 4,a		RES 4,A
      defb $CB,$80+$20	;res 4,b	res 4,b		RES 4,B   
      defb $CB,$81+$20	;res 4,c	res 4,c		RES 4,C   
      defb $CB,$82+$20	;res 4,d	res 4,d		RES 4,D   
      defb $CB,$83+$20	;res 4,e	res 4,e		RES 4,E   
      defb $CB,$84+$20	;res 4,h	res 4,h		RES 4,H   
      defb $CB,$85+$20	;res 4,l	res 4,l		RES 4,L 
    					
      defb $CB,$87+$28	;res 5,a	res 5,a		RES 5,A
      defb $CB,$80+$28	;res 5,b	res 5,b		RES 5,B   
      defb $CB,$81+$28	;res 5,c	res 5,c		RES 5,C   
      defb $CB,$82+$28	;res 5,d	res 5,d		RES 5,D   
      defb $CB,$83+$28	;res 5,e	res 5,e		RES 5,E   
      defb $CB,$84+$28	;res 5,h	res 5,h		RES 5,H   
      defb $CB,$85+$28	;res 5,l	res 5,l		RES 5,L 
    					
      defb $CB,$87+$30	;res 6,a	res 6,a		RES 6,A
      defb $CB,$80+$30	;res 6,b	res 6,b		RES 6,B   
      defb $CB,$81+$30	;res 6,c	res 6,c		RES 6,C   
      defb $CB,$82+$30	;res 6,d	res 6,d		RES 6,D   
      defb $CB,$83+$30	;res 6,e	res 6,e		RES 6,E   
      defb $CB,$84+$30	;res 6,h	res 6,h		RES 6,H   
      defb $CB,$85+$30	;res 6,l	res 6,l		RES 6,L 
    					
      defb $CB,$87+$38	;res 7,a	res 7,a		RES 7,A
      defb $CB,$80+$38	;res 7,b	res 7,b		RES 7,B   
      defb $CB,$81+$38	;res 7,c	res 7,c		RES 7,C   
      defb $CB,$82+$38	;res 7,d	res 7,d		RES 7,D   
      defb $CB,$83+$38	;res 7,e	res 7,e		RES 7,E   
      defb $CB,$84+$38	;res 7,h	res 7,h		RES 7,H   
      defb $CB,$85+$38	;res 7,l	res 7,l		RES 7,L 
    			
    			
      defb $CB,$46	;bit 0,[hl]	bit 0,[hl]	BIT 0,(HL)
      defb $CB,$4E	;bit 1,[hl]	bit 1,[hl]	BIT 1,(HL)
      defb $CB,$56	;bit 2,[hl]	bit 2,[hl]	BIT 2,(HL)
      defb $CB,$5E	;bit 3,[hl]	bit 3,[hl]	BIT 3,(HL)
      defb $CB,$66	;bit 4,[hl]	bit 4,[hl]	BIT 4,(HL)
      defb $CB,$6E	;bit 5,[hl]	bit 5,[hl]	BIT 5,(HL)
      defb $CB,$76	;bit 6,[hl]	bit 6,[hl]	BIT 6,(HL)
      defb $CB,$7E	;bit 7,[hl]	bit 7,[hl]	BIT 7,(HL)
    		                
      defb $CB,$C6	;set 0,[hl]	set 0,[hl]	SET 0,(HL)
      defb $CB,$CE	;set 1,[hl]	set 1,[hl]	SET 1,(HL)
      defb $CB,$D6	;set 2,[hl]	set 2,[hl]	SET 2,(HL)
      defb $CB,$DE	;set 3,[hl]	set 3,[hl]	SET 3,(HL)
      defb $CB,$E6	;set 4,[hl]	set 4,[hl]	SET 4,(HL)
      defb $CB,$EE	;set 5,[hl]	set 5,[hl]	SET 5,(HL)
      defb $CB,$F6	;set 6,[hl]	set 6,[hl]	SET 6,(HL)
      defb $CB,$FE	;set 7,[hl]	set 7,[hl]	SET 7,(HL)
    		                
      defb $CB,$86	;res 0,[hl]	res 0,[hl]	RES 0,(HL)
      defb $CB,$8E	;res 1,[hl]	res 1,[hl]	RES 1,(HL)
      defb $CB,$96	;res 2,[hl]	res 2,[hl]	RES 2,(HL)
      defb $CB,$9E	;res 3,[hl]	res 3,[hl]	RES 3,(HL)
      defb $CB,$A6	;res 4,[hl]	res 4,[hl]	RES 4,(HL)
      defb $CB,$AE	;res 5,[hl]	res 5,[hl]	RES 5,(HL)
      defb $CB,$B6	;res 6,[hl]	res 6,[hl]	RES 6,(HL)
      defb $CB,$BE	;res 7,[hl]	res 7,[hl]	RES 7,(HL)  
      
      defb $C3,0,0	;jp 0		jp $0000	JP nn
      
      defb $C2,0,0	;jp nz,0	jp nz,$0000	JP NZ,nn
      defb $CA,0,0	;jp z,0		jp z,$0000	JP Z,nn 
      defb $D2,0,0	;jp nc,0	jp nc,$0000	JP NC,nn
      defb $DA,0,0	;jp c,0		jp c,$0000	JP C,nn 
      
      defb $E9	;jp [hl]	jp [hl]		JP (HL)  
    
    
      defb $18,0	;4309 jr $430B	jr $430B	JR n
      
      defb $20,0	;430B jr nz,$430D	jr nz,$430D	JR NZ,n
      defb $28,0	;430D jr z,$430F	jr z,$430F	JR Z,n 
      defb $30,0	;430F jr nc,$4311	jr nc,$4311	JR NC,n
      defb $38,0	;4311 jr c,$4313	jr c,$4313	JR C,n 
      
      
      defb $CD,0,0	;call 0		call $0000	CALL nn
    	         
      defb $C4,0,0	;call nz,0	call nz,$0000	CALL NZ,nn 
      defb $CC,0,0	;call z,0	call z,$0000	CALL Z,nn  
      defb $D4,0,0	;call nc,0	call nc,$0000	CALL NC,nn 
      defb $DC,0,0	;call c,0	call c,$0000	CALL C,nn  
      
      
      defb $C7	;rst 0		rst $00		RST 00H
      defb $CF	;rst 8		rst $08		RST 08H
      defb $D7	;rst $10	rst $10		RST 10H
      defb $DF	;rst $18	rst $18		RST 18H
      defb $E7	;rst $20	rst $20		RST 20H
      defb $EF	;rst $28	rst $28		RST 28H
      defb $F7	;rst $30	rst $30		RST 30H
      defb $FF	;rst $38	rst $38		RST 38H
      
      
      defb $C9	;ret		ret		RET       
      
      defb $C0	;ret nz		ret nz		RET NZ
      defb $C8	;ret z		ret z		RET Z 
      defb $D0	;ret nc		ret nc		RET NC
      defb $D8	;ret c		ret c		RET C 
      
      defb $D9	;reti		reti		RETI

    Этот пользователь поблагодарил NEO SPECTRUMAN за это полезное сообщение:

    Ped7g(28.09.2019)

  5. #4

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    По умолчанию

    excellent, thank you... chewing on it now...

    - - - Updated - - -

    the "ld hl,[sp+$00]" (bgb) is atrocious, I'm not going to add support for this one by 100%.

    Seems `ld hl,sp+<expression>` has to somehow happen (looks like too official/preferred to ignore)... and if *that* happens, then `ldhl sp,n` is probably a bit redundant (and not as obvious/clear as I would wish for, so `ldhl` may be not included in sjasmplus).

    And as I wrote before, I don't like `ld a,[$ff00+c] / ld a,($ff00+c)` (again bgb and variant in pdf), that's probably another one to be not expected.

    `ldh a,[$FF00]` is kinda bleeding my eyes, but I can support it (doing warning about truncated value only if `high(expression)` is not zero and not $FF, so this syntax will be without warning then (but other 16b values will emit warning in "ldh")).

    Everything else looks either already compatible with sjasmplus, or too important to be ignored and *needs* to be implemented, or as reasonably simple addition.

    So in the end, if I add only the ones I like, the IDA will be 100% compatible, bgb source will fail on 3-5 instructions, and GBCPUman.pdf will have always at least one variant supported (on most instructions all variants should work, but few will be incompatible).

    That sounds to me better than I expected...

    Any info about that header checksum, how to calculate it?

    And is it not the same situation as GBA, where you must include the Nintendo logo graphics in the ROM at precise address to not fail the bootloader check, but that means you are breaching the copyright if you are doing homebrew without official Nintendo license?

    If there is similar (C) protection scheme on GB/GBP/GBC, then of course the required binary part will be *NOT* part of sjasmplus, and developers will have to obtain it by their own means (and decide themselves, if it is a good idea to breach big N copyright ... usually not a very good idea, unless you are just doing it for your own education and not releasing anything).

    But as long as the dev provides all the required binaries and assembles header data at correct addresses, the sjasmplus can provide some macro which will calculate the correct checksum, that should be legal to add.

  6. #5

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    Цитата Сообщение от Ped7g Посмотреть сообщение
    Any info about that header checksum, how to calculate it?
    например

    Код:
    0000       Restart $00 Address
               (RST $00 calls this address.)
    0008       Restart $08 Address 
               (RST $08 calls this address.)
    0010       Restart $10 Address 
               (RST $10 calls this address.)
    0018       Restart $18 Address 
               (RST $18 calls this address.)
    0020       Restart $20 Address 
               (RST $20 calls this address.)
    0028       Restart $28 Address 
               (RST $28 calls this address.)
    0030       Restart $30 Address 
               (RST $30 calls this address.)
    0038       Restart $38 Address 
               (RST $38 calls this address.)
    
    0040       Vertical Blank Interrupt Start Address
    
    0048       LCDC Status Interrupt Start Address
    
    0050       Timer Overflow Interrupt Start Address
    
    0058       Serial Transfer Completion Interrupt 
               Start Address
    
    0060       High-to-Low of P10-P13 Interrupt 
               Start Address
    An internal information area is located at 0100-014F in
    each cartridge. It contains the following values:
    
    0100-0103  This is the begin code execution point in a
               cart. Usually there is a NOP and a JP
               instruction here but not always.
    
    0104-0133  Scrolling Nintendo graphic:
            CE ED 66 66 CC 0D 00 0B 03 73 00 83 00 0C 00 0D
            00 08 11 1F 88 89 00 0E DC CC 6E E6 DD DD D9 99
            BB BB 67 63 6E 0E EC CC DD DC 99 9F BB B9 33 3E
               ( PROGRAM WON'T RUN IF CHANGED!!!)
    
    0134-0142  Title of the game in UPPER CASE ASCII. If it
               is less than 16 characters then the
               remaining bytes are filled with 00's.
    
    0143       $80 = Color GB, $00 or other = not Color GB
    
    0144       Ascii hex digit, high nibble of licensee
               code (new).
    
    0145       Ascii hex digit, low nibble of licensee 
      code (new). (These are normally $00 if
               [$014B] <> $33.)
    
    0146       GB/SGB Indicator (00 = GameBoy, 03 = Super
               GameBoy functions)
               (Super GameBoy functions won't work 
               if <> $03.)
    
    0147       Cartridge type:
        0-ROM ONLY             12-ROM+MBC3+RAM
        1-ROM+MBC1             13-ROM+MBC3+RAM+BATT
        2-ROM+MBC1+RAM         19-ROM+MBC5
        3-ROM+MBC1+RAM+BATT    1A-ROM+MBC5+RAM
        5-ROM+MBC2             1B-ROM+MBC5+RAM+BATT
        6-ROM+MBC2+BATTERY     1C-ROM+MBC5+RUMBLE
        8-ROM+RAM              1D-ROM+MBC5+RUMBLE+SRAM
        9-ROM+RAM+BATTERY      1E-ROM+MBC5+RUMBLE+SRAM+BATT
        B-ROM+MMM01            1F-Pocket Camera
        C-ROM+MMM01+SRAM       FD-Bandai TAMA5
        D-ROM+MMM01+SRAM+BATT  FE - Hudson HuC-3
        F-ROM+MBC3+TIMER+BATT  FF - Hudson HuC-1
       10-ROM+MBC3+TIMER+RAM+BATT
       11-ROM+MBC3
    
    0148       ROM size:
                 0 - 256Kbit =  32KByte =   2 banks
                 1 - 512Kbit =  64KByte =   4 banks
                 2 -   1Mbit = 128KByte =   8 banks
                 3 -   2Mbit = 256KByte =  16 banks
                 4 -   4Mbit = 512KByte =  32 banks
                 5 -   8Mbit =   1MByte =  64 banks
                 6 -  16Mbit =   2MByte = 128 banks
               $52 -   9Mbit = 1.1MByte =  72 banks
               $53 -  10Mbit = 1.2MByte =  80 banks
               $54 -  12Mbit = 1.5MByte =  96 banks
    
    0149       RAM size:
               0 - None
               1 -  16kBit =  2kB = 1 bank
               2 -  64kBit =  8kB = 1 bank
               3 - 256kBit = 32kB = 4 banks
               4 -   1MBit =128kB =16 banks
    
    014A       Destination code:
               0 - Japanese
               1 - Non-Japanese
    
    014B       Licensee code (old):
               33 - Check 0144/0145 for Licensee code.
               79 - Accolade
               A4 - Konami
               (Super GameBoy function won't work 
               if <> $33.)
    
    014C       Mask ROM Version number (Usually $00)
    
    014D       Complement check
               (PROGRAM WON'T RUN ON GB IF NOT CORRECT!!!)
               (It will run on Super GB, however, 
               if incorrect.)
    
    014E-014F  Checksum (higher byte first) produced by
               adding all bytes of a cartridge except for
               two checksum bytes and taking two lower
               bytes of the result. (GameBoy ignores this
               value.)
    а так для тестирования в bgb
    можно загрузить любой .bin любого размера
    просто header заполнить 0
    а с его дебагера можно уже запустить с любого адреса

    - - - Добавлено - - -

    http://bgb.bircd.org/
    Последний раз редактировалось NEO SPECTRUMAN; 28.09.2019 в 11:46.

  7. #6

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    Цитата Сообщение от NEO SPECTRUMAN Посмотреть сообщение
    ...
    Ok, "--lr35902" added to sjasmplus. You can check the listing of the test to see which variants of syntax are supported and which not.
    https://github.com/z00m128/sjasmplus...tax_by_neo.lst

    I will add more tests in following days to verify all code paths, range checking, disabling of all Z80-only instructions, etc... but I did test the implementation a bit already while working on it, should be quite solid. I will need you to review also those new tests added later, but you can start by this first one...

    And ultimately it would be nice if you would try to actually build some working binary and confirm it works and sjasmplus is usable also for LR35902 programming...

    As mentioned before, the IDA disassembly + sjasmplus assembly may not produce identical binary due to ambiguity of such process, but you can patch the source with "db" to force sjasmplus emit identical binary in areas where it fails (it should fail only due to ambiguity = not bug, any other difference is bug of course).

    Этот пользователь поблагодарил Ped7g за это полезное сообщение:

    NEO SPECTRUMAN(30.09.2019)

  8. #7

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    by default the sjasmplus understands "a," as multi-arg: "sub a,0" = "sub a : sub 0" (!)
    кстати это мне мешает и при писании под z80

    как по мне все "комбинированные" команды типа ld hl,0,bc,0,a,0,e,0
    это есть FAKE instructions
    и должны быть отключаемыми чтоб не мешали


    ага почитал инструкцию
    потом попробую поклацать `--syntax=a`

    - - - Добавлено - - -

    Ped7g, так же возможно нужно выдавать предупреждение
    если после команд halt не стоит nop

    так как команда после halt по ошибке читается 2 раза
    однобайтная команда будет исполнена 2 раза подряд

    а 2-х 3-х байтная п

    76 halt
    fa 34 12 ld a,[1234]

    по идеи на gameboy-е превратится в

    76 halt
    fa fa 32 ld a,[12fa]
    12 ld [de],a


    хотя это явление можно использовать в своих целях
    Последний раз редактировалось NEO SPECTRUMAN; 30.09.2019 в 05:41.

    Этот пользователь поблагодарил NEO SPECTRUMAN за это полезное сообщение:

    Ped7g(30.09.2019)

  9. #8

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    Цитата Сообщение от NEO SPECTRUMAN Посмотреть сообщение
    так же возможно нужно выдавать предупреждение
    если после команд halt не стоит nop
    It repeats opcode only when `halt` is encountered in `DI` mode? (from what I have read, I have zero real experience) (contrary to ZX where such situation is total freeze - until NMI/reset).

    Anyway, this is something completely new in sjasmplus, to warn on instruction depending on the state from previous instruction. I understand it may be very handy, but I'm not sure if/how to add that. I will take a quick look, but I don't like this idea too much (it will be probably quite a mess to add)... in PC world of compilers this would be perfect case for lint-warning, not compiler. But there's no sjasmplus-lint ... yet? ...

    (actually would be maybe interesting to create a SW doing some static analysis of Z80 machine code and issue warnings about common probably-bug codes, although I personally would really rather like IDE which would support running pieces of code in head-less emulator and display the "live" results and/or use that for unit test... there is some effort from Maziac to build something like this for VS Code, but I'm avoiding anything from Microsoft, so I didn't try it yet (if you don't mind VSC used as base editor, then definitely check this: https://github.com/maziac/z80-unit-tests ... this is IMHO such a killer thing, that I'm actually thinking about trying it out, even if I will have to revoke my MS ban temporarily for VSC ... also I'm not sure how well it works in current version, but if it would be based on any other free editor, I would be already trying to help to develop it ... and such IDE running also the lint-tool in background ... you get the idea)

    So I will give it a quick look, but I'm afraid this will have no good place to land and it will not happen right now.

    -----

    Цитата Сообщение от NEO SPECTRUMAN Посмотреть сообщение
    кстати это мне мешает и при писании под z80
    well, yes, that was of the main goals why I did take a look into sjasmplus sources, to get rid of bugs from `ld a,(flag1|flag2)` and `sub a,5`. But both fixes are hidden under new `--syntax` option, so the sjasmplus is mostly backward compatible with 1.07 version (and I know I did break this compatibility already in many small details, but every now and then somebody search for some old intro/tool source compiled by 1.07, and almost always it works without any change, so I think I was 50% successful with this "don't break old sources" ... actually I'm growingly unhappy by how many things I did already break, and I don't want to break anything more right now, if anything else requires change in default behaviour, I'm postponing it to "v2.0" ... and that's uncertain, when it will happen, if ever)

    Anyway, I strongly suggest to use `--syntax=abfw` as default when writing new source (and probably patch old source to work with this setting too)... the "--syntax=abf" will be highly likely the syntax of v2.0 (and it will be mandatory in 2.0), so by using these already now your source will have higher chance to work in 2.0 without a change.

    If somebody reading this is not familiar what it is:
    "a" = multiarg delimiter is ",,", example `ld hl,1,,bc,2,,de,3 : sub a,c,,5,,a,,a,3` (the second is `sub c : sub 5 : sub a : sub 3`, the single vs double comma makes it possible for sjasmplus to tell which part is new `sub`, and which part is extra "a," like add/adc/sbc has)
    "b" = round parentheses (around whole expression) may be used only for memory acces `ld b,(4)` = error, `ld b,(2)+(2)` = ok, `ld b,+(4)` = ok
    "f" is producing warnings on all fake instructions (if you use some by accident)
    "w" is "warning as errors", so you will never miss any warning in the source

    There is also "B" option, which is my personal preference, that one enforces usage of square brackes for memory, so `ld a,(expr)` is always `ld a,imm8` and for memory you must use `ld a,[expr]`, so in my sources I'm planning to use rather `--syntax=aBfw`, but that will make them probably a bit incompatible with other people, so I'm still not sure.

    This whole --syntax option is sort of not that great idea, although I designed it together with OPT directive to work in a way where you can change syntax only temporarily for part of source and then "pop" back previous syntax options, so I can still write some library code for others, and use my options, and they can still include my source.

    Anyway, for people who don't like these more strict syntax things, and generally don't like any change, I want to leave v1.14.x in near-perfect state, so they can stick to it for decades... for people like me, who don't mind to fix the source and rather want more warnings/errors and stricter syntax, the v2.0 is planned...

  10. #9

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    It repeats opcode only when `halt` is encountered in `DI` mode? (from what I have read, I have zero real experience) (contrary to ZX where such situation is total freeze - until NMI/reset).

    Anyway, this is something completely new in sjasmplus,
    В принципе это не важно

    rgbasm (тот чей синтаксис по идеи применен в IDA)
    при компиляции halt

    генерирует сразу последовательность halt nop

    а ты потом сидишь и ищешь
    почему же дизассемблированный скомпилированный код не совпадает с оригиналом

  11. #10

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    Цитата Сообщение от Ped7g Посмотреть сообщение
    IAnyway, this is something completely new in sjasmplus, to warn on instruction depending on the state from previous instruction.
    How you can find previous instruction, if HALT is reached after jump or call?
    Seems tracking previous instruction is only half of solution, and looks more like crutch.

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