Well ... some progress has been made. Using a scope I could confirm the clocks for the CPLD & CPU, also I can see some activity on the Data/Adress buses.
One of my cards appears to be dead with the reset line only going as high as 3.7V
Using my other card with a 18MHz crystal and the 18MHz firmware for the CPLD + the 1.05a ROM I can get my test demo and zynap_gs to load. However only the first sample plays briefly (but long enough to recognize) and then the card goes silent.
With a 12MHz crystal and 12MHz firmware it still hangs whenever I try to load anything onto the GS.
I guess the 20MHz Z80s I got are fake? They have a suspiciously new datecode with 1326 (26th week of 2013 I guess). However any ideas why the 12MHz firmware gets me nowhere?




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